Multimedia application processor performance enhancement key

Tag: Multimedia Application Processor

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Mobile terminal devices are widely used in multimedia applications, and the quality requirements are even more advanced. For example, 2D display is promoted to 3D display, while tasks such as video, audio, communication, and navigation are at the same time. Basic applications are applied from the baseband processor. A dedicated multimedia application processor, and even a large-scale enhancement of multimedia application processor performance, to cope with the increasingly heavy processing needs...

Caption: The application of mobile terminal devices is becoming more and more abundant, but the resources that can be applied by the system are relatively limited. How to make the device show the best multimedia presentation effect? ​​The processor architecture and performance are absolutely important! Nowadays, such as PDA, PMP, PND... The need for extremely high computing performance support, architecture optimization of multimedia application processors and system environments, is an important basis for the practical value of such mobile devices...

Multimedia application processor performance enhancement key

Mobile phones, digital TVs, digital cameras, personal navigation devices (PNDs), portable players (PMPs), etc., which deal with the original main components, called the Baseband Processor, but in multimedia applications, The more emphasis is placed on quality audio and video playback, which has surpassed the processing power of the baseband processor. Therefore, the Multimedia Application Processor becomes a member of the coprocessor in the mobile device.

In other words, the multimedia application processor is originally only one type of processor in the mobile device. Taking the mobile phone as an example, the internal processor has a high-end multimedia application processor (High-End Multimedia Application Processor), a baseband or an integration according to the IDC definition. Integrated Baseband Processor, OS Application Processor, Multimedia Applications Processor, Multimedia Co-processor, Camera Image Coprocessor (Camera) Coprocessor), and LCD controllers (LCD Controller).

Among the above-mentioned processors, today's multimedia applications are advancing with the market trend of quality and quantity. The multimedia application processor has become an important component in many mobile devices that were not originally in this position! Its design and development trend Sufficient to affect the overall performance of the mobile device.

High-quality multimedia applications, progressive multimedia applications, enhanced performance

The development of multimedia application processors has so far been the first important design direction to enhance performance. The practice is divided into two categories. One is to further strengthen and adjust the original architecture. The direct method is to increase the frequency and increase the nonlinearity, and pay more attention to the efficiency of each frequency (such as MIPS or DMIPS/MHz). ), so micro-architecture adjustments are also very important.

The multimedia application processor micro-architecture strengthens a lot of directions. For example, using a higher-efficiency Super-scale Pipeline allows a single frequency to execute multiple instructions; an enhanced floating-point arithmetic unit (FPU), such as an accelerated single Double and double precision scalar operation speed, and add extra 16-bit floating-point data type conversion instructions to improve data exchange speed with embedded 3D processor; built-in multimedia processor (Media Processor Engine), support SIMD Operation mode, such as processing 8, 16, 32-bit integer and 32-bit floating-point arithmetic data per cycle, even supporting mixed data types, eliminating the resources required for encapsulation/decapsulation, and structured loading/storing functions, so that data does not have to be Convert between the calculation format and the mechanical format.

In the external aspect of the micro-architecture, the access efficiency between the memory and the memory can be enhanced, such as increasing the cache capacity/bandwidth, reducing the delay, and solving the consistency problem between the L1/L2 caches, for example, setting up a detection control unit ( Snoop Control Unit; SCU) However, any contact with the associated area in memory will be monitored by the SCU. The information required for the test is stored in the processor L1 cache. If the information is already stored in the cache, the information is directly Return the request component, otherwise it will use the optimization algorithm to try to make the data use L2 cache as much as possible, thereby eliminating the power consumption directly derived from the external memory of the chip and improving the overall performance.

Single-core optimization, bottlenecks in multi-tasking, for example, a mobile terminal may simultaneously perform video/audio playback, navigation and positioning, database search, wireless transmission, etc., and a single multimedia application processor with powerful performance. Often it is also stretched, so multi-core is the best solution. However, it must be stated here that the heterogeneous multi-core architecture in which the baseband/multimedia application processor is packaged together is not discussed here, but the multimedia application processor itself uses homogeneous multi-core operation.

The multi-core architecture brings performance improvement. In the software support environment, the new instructions are used to allow the multi-core processor to dynamically switch from super-scaling execution to executing multiple parallel threads during program execution, and to establish multiple execution threads within the program. Mechanism, only dual core for decoding MPEG-2 performance, 52% higher than single core! However, the true value of multi-core, in addition to direct performance improvement, more importantly, multi-core processors can also make full use of different applications Instruction-Level Parallelism (ILP) and threading-level Parallelism (TLP), in other words, higher ILP and TLP applications, higher adaptability to multi-core architecture, performance improvement It will be even bigger.

As for the negative impact of the core, it is divided into hardware and software. In terms of hardware, it is a mobile terminal device that is more than one core. It means more than 1x transistor, but in most applications, the performance is not doubled, but the current semiconductor technology advances, multi-core design can have Transistor sharing of varying degrees (such as L2 cache or memory logic control circuit sharing, etc.) reduces multi-core chip size and power consumption.

On the contrary, software problems are more complicated. For example, multiple threads or even applications access the same memory block. If one program is not optimized for multi-core operation, it may make the system unstable. Correcting embedded software and multi-core optimization in response to multi-core environments is a major obstacle to the development of multi-core multimedia application processors.

However, overall, just as x86 processors encounter high energy consumption and high thermal bottlenecks in frequency development, that is, through the development trajectory of multi-core solutions, it is also an inevitable trend for multimedia application processors to capture multiple performance core bottlenecks. However, multi-core is more sensitive to chip area, so the progress of semiconductor manufacturing has become the key to development. In addition, the power-saving mechanism design of the multi-core architecture is also very important. If it is properly distributed, it can save more power and be more efficient than a single core.

The primary goal of multimedia application processor design

Caption: The primary goal of multimedia application processor design is flexible architecture and performance enhancement to accommodate a variety of device needs. (Toshiba)

Multi-core operation enhances processor architecture

Caption: Multi-core operation can strengthen the processor architecture, which is also the trend of multimedia application processor design, but the software support still needs to be tested. (ARM)

Single-core development faces bottlenecks

Single-core development faces bottlenecks

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